SYS-CON MEDIA Authors: Stacy Gorkoff, Yung Chou, Bob Gourley, RealWire News Distribution, Paul Miller

News Feed Item

Research and Markets: Texas Instrument DLP PicoTM projector family - Reverse Costing Report

Research and Markets (http://www.researchandmarkets.com/research/4bg2cx/texas_instrument) has announced the addition of the "Texas Instrument DLP® PicoTM projector family - Reverse Costing Report" report to their offering.

System Plus Consulting is proud to publish the reverse costing report of three DLP® Pico projectors (DLP® nHD, DLP® 0.17 HVGA and the DLP® 0.3 WVGA) supplied by Texas instrument.

Featuring a nHD resolution (640 x 360) and packaged in a small ceramic housing (16mm x 6.9mm), The DLP nHD, is the thinnest and the smallest DLP Pico projector. It is ideally suited for mobile application and was extracted from the Galaxy beam phone.

The DLP1700, features a Half-VGA Resolution (480 x 320), and has a 0.17-Inch Micromirror Array Diagonal, while the DLP3000 features a Wide-VGA Resolution (608 × 684) and has a 0.3-Inch Micromirror Array Diagonal.

Both of them, are ideally suited for Pocket Projectors and were extracted from Optima devices.

Key Topics Covered:

Overview / Introduction

Texas instrument Company Profile

Physical Analysis

- Synthesis of the Physical Analysis

- DLP® 0.17 HVGA: Package Characteristic

- DLP® 0.17 HVGA: Package Opening

- DLP® 0.17 HVGA: Package Cross Section

- DLP® 0.17 HVGA: Process technology

- DLP® 0.17 HVGA: Micromirrors-Pictures

- DLP® 0.3 WVGA: Package Characteristics

- DLP® 0.3 WVGA: Package Opening

- DLP® 0.3 WVGA: Package Cross Section

- DLP® 0.3 WVGA: Process technology

- DLP® 0.3 WVGA: Micromirrors-Pictures

- DLP® nHD: Package Characteristics

- DLP® nHD: Package Opening

- DLP® nHD: Package Cross Section

- DLP® nHD: Process technology

- DLP® nHD: Micromirrors-Pictures

Manufacturing Process Flow

- Wafers Fabrication Units

- Front-End Manufacturing Process Flow:

- Back-End Packaging Process Flow

- Back-End Packaging Assembly Unit

Cost Analysis

- Synthesis of the Cost Analysis

- CMOS Wafer Front-End Cost

- CMOS Die Cost

- MEMS Wafer Front-End Cost

- MEMS Front-End Cost per Steps

- MEMS Front-End Cost per Equipment

- MEMS Front-End Cost per Consumables

- MEMS Die Cost

- Back-End : Package Cost

- Back-End : Package Cost Per Steps

- Manufacturing Cost

Estimated Manufacturer Price

For more information visit http://www.researchandmarkets.com/research/4bg2cx/texas_instrument

More Stories By Business Wire

Copyright © 2009 Business Wire. All rights reserved. Republication or redistribution of Business Wire content is expressly prohibited without the prior written consent of Business Wire. Business Wire shall not be liable for any errors or delays in the content, or for any actions taken in reliance thereon.