SYS-CON MEDIA Authors: Pat Romanski, Nikita Ivanov, Yeshim Deniz, Elizabeth White, Sean Houghton

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Uniquify Delivers High-Performance DDR3 Memory System Running in Low-Cost, Wire Bond Package

Adaptive DDR IP Enables Highest Performance From Wire Bond Packaging in 28nm Process

SAN JOSE, CA -- (Marketwired) -- 05/15/14 -- Uniquify, a leading high-performance semiconductor intellectual property (IP) and system-on-chip (SoC) integration and manufacturing services supplier, today announced that it has achieved an ultrafast DDR3 performance of 2100 megabits per second (Mbps) in a low-cost wire bond package.

The DDR3 IP subsystem is implemented in a customer design in a low-power 28-nanometer (nm) process for a high-volume consumer application that requires the use of a low-cost wire bond package.

Uniquify was able to achieve 2100Mbps (1.05Ghz clock rate) performance in the selected wire bond package favored by price-sensitive consumer electronics product manufacturers as an alternative to higher cost flip chip packages. This performance was made possible through application of Uniquify's adaptive technologies, dynamic self-calibrating logic (DSCL) and dynamic adaptive bit calibration (DABC).

"This unheard of DDR3 performance in wire bond packaging is a testament to the power of our patented dynamic adaptive DDR technologies, DSCL and DABC," says Sam Kim, chief operating officer of Uniquify. "Using our adaptive DDR IP, design teams will be able to deliver higher performance products while enjoying the lower cost benefits of wire bond packaging. In short, this is a game-changer for a cost sensitive market like consumer electronics!"

The performance boost is due to Uniquify's patented and adaptive DSCL and DABC technologies built into its DDR PHY IP. DSCL dynamically tracks the DDR timing and automatically centers the sample point in the middle of the window, allowing the DDR clock speed to be increased without sacrificing stability or requiring the use of a more expensive package. DABC performs dynamic skew alignment at the bit level that further improves the quality of the DDR timing. The ability to achieve the highest performance with low system cost is a result of employing DSCL and DABC in the on-chip DDR IP subsystem.

Uniquify at DAC
Uniquify will be an exhibitor at the 51st Design Automation Conference (DAC) in Booth #1013 Monday, June 2, through Wednesday, June 4, from 9 a.m. until 6 p.m. at the Moscone Center in San Francisco.

For information about DAC website, visit: www.dac.com.

About Uniquify
Uniquify is a rapidly growing system-on-chip (SoC) design, integration and manufacturing services supplier, and innovative developer of high-performance semiconductor intellectual property (IP) offering the world's fastest DDR memory IP. Its "ideas2silicon" services range from specification development and front-end design through physical design and delivery of packaged, tested chips. It offers 65-, 40- and 28-nanometer SoC design expertise, integration and manufacturing services to leading semiconductor and system companies worldwide. Uniquify's adaptive DDR subsystem IP offers the highest DDR performance with the lowest power, smallest area and the best system reliability -- a result of its patented self-calibrating technology. Uniquify's headquarters and primary design center is in San Jose, Calif., with additional design and technical sales and support teams in China, India, Japan, Korea and Vietnam. For more information, visit: www.uniquify.com.

ideas2silicon is a trademark of Uniquify. Uniquify acknowledges trademarks or registered trademarks of other organizations for their respective products and services.

For more information, contact:
Bob Smith
Uniquify
(650) 269-8780
Email Contact

Nanette Collins
Public Relations for Uniquify
(617) 437-1822
Email Contact

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