SYS-CON MEDIA Authors: Xenia von Wedel, Peter Silva, Glenn Rossman, Ava Smith, Elizabeth White

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Real Intent Unveils New Release of Ascent Lint for Early Verification of Digital Designs

Significant Enhancements and New Integration With MathWorks Boost Productivity and Quality for Complex SoC and FPGA Designs

SUNNYVALE, CA--(Marketwired - May 22, 2014) - Real Intent, Inc., a leading provider of EDA software products today announced the 2014 version of its Ascent Lint product, the industry's fastest and most accurate tool for early verification of digital designs, with significant new enhancements for users. In addition it announced the tight integration of Ascent Lint within MATLAB® and Simulink®, the market-leading technical computing software from The MathWorks, Inc. -- a move that promotes a safe and reliable implementation flow for digital synthesis tools used by ASIC and FPGA designers.  Real Intent will demonstrate the new version of Ascent Lint in Booth #1825 at the Design Automation Conference in San Francisco next month.

Real Intent's Ascent products find design errors leading to improved quality of results and higher productivity for both design and verification engineers. The new 2014 version of Ascent Lint delivers enhanced support for the SystemVerilog language, deeper rule coverage, low-noise reporting of design issues and easy configurability.

For users of MATLAB® and Simulink®, MathWork's HDL Coder™ generates portable, synthesizable Verilog® and VHDL code from MATLAB functions, Simulink models, and Stateflow® charts.  Ascent Lint is now integrated with the HDL Coder user interface that automates the setup of files and commands for Ascent Lint. This tight integration enables users to verify that the RTL code generated using HDL Coder is compliant with users' coding conventions and industry standards, for a safe and reliable implementation flow for digital synthesis tools used by ASIC and FPGA designers.

Further notable enhancements and new features for Ascent Lint include:

  • 24 new lint rules that ensure design code quality and consistency for a wide range of potential issues
  • New multiple configuration file support providing hierarchical waiver management
  • New report customization to improve readability
  • Platform support for computers running the SUSE Linux Enterprise version 11, or later, operating system

"Our new 2014 Ascent Lint release addresses the needs of our customers who are developing next-generation designs for FPGAs or complex SoCs," said Graham Bell, vice president of Marketing at Real Intent. "It is a direct result of Real Intent experts working with industry leaders to define and implement richer rules. The integration with our newest industry partner, MathWorks, ensures that their synthesized HDL meets all the industry standards for quality and compatibility. These enhancements demonstrate our commitment to support design engineering teams with the industry's best possible tools for verification of digital designs."

For more information about the new enhancements for Ascent Lint 2014, please click here to see a short (3 minute) video by Srinivas Vaidyanathan, staff technical engineer at Real Intent.

Availability

The new release of Ascent Lint is available in June 2014. Pricing depends on product configuration.

About Real Intent
Companies worldwide rely on Real Intent's EDA software to accelerate functional verification and advanced sign-off of electronic designs. The company provides comprehensive CDC verification, advanced RTL analysis and sign-off solutions to eliminate complex failure modes of SoCs. Real Intent's Meridian and Ascent product families lead the market in performance, capacity, accuracy and completeness. Please visit www.realintent.com for more information.

Acronyms                                        
ASIC:    Application-Specific Integrated Circuit
CDC:     Clock Domain Crossing                  
EDA:     Electronic Design Automation           
FPGA:    Field-Programmable Gate Array          
HDL:     Hardware Description Language          
RTL:     Register Transfer Level                
SoC:     Systems-on-Chip                        
VHDL:    VHSIC High-level Design Language       

Real Intent and the Real Intent logo are registered trademarks, and Ascent and Meridian are trademarks of Real Intent, Inc. MATLAB and Simulink are registered trademarks of The MathWorks, Inc.  See mathworks.com/trademarks for a list of additional trademarks. All other trademarks and trade names are the property of their respective owners.

Embedded Video Available: https://www.youtube.com/watch?v=4uAZ414iKvg

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