Lattice Semiconductor expanded its commitment to open source embedded system design by releasing an implementation of the uClinux Operating System (OS) targeted for its LatticeMico32 embedded soft core processor.

The new OS support allows developers to implement control systems in a design flow that builds on Lattice's open source embedded solutions approach. It also complements the enhanced capabilities of the LatticeMico32 microprocessor core announced with the release of Lattice’s ispLEVER version 7.0 SP2. New features include slave side arbitration for higher performance, enhanced peripheral support for improved integration and support of the LatticeMico32 system design tool flow under Linux. Lattice has also concurrently released a new version of the LatticeMico8 microcontroller that increases addressable code space and has configurable address range and improved stack operations for support of high-level compilers, while keeping a very small footprint.

“These releases are in keeping with the open source model that Lattice has adopted for our embedded systems design solutions,” said Stan Kopec, Lattice corporate vice president of marketing. “Designers around the globe are embracing our comprehensive system solutions that include the most advanced FPGA devices, processor and peripheral cores, hardware/software design and debug tools and expanding OS support. They appreciate the visibility, flexibility and portability of an open source solution and our latest uClinux port to our LatticeMico32 processor further demonstrates our commitment.”

Lattice contracted with Theobroma Systems of Austria to assist with the port of the uClinux OS to the LatticeMico32 microprocessor. Theobroma Systems has significant experience in embedded systems development of open source solutions. Their solutions portfolio ranges from creating customized board-support packages or development tools to turnkey projects based on embedded Linux.

“Based on our prior experience, both with FPGA-based design projects and Linux on other architectures, the depth of the LatticeMico32 solution positively surprised us,” stated Dr. Philipp Tomsich, CTO at Theobroma Systems. “The LatticeMico32 microprocessor is an exceptional processor architecture, which simplifies porting operating systems with its regular design. The peripherals included as part of the LatticeMico32 System Builder (MSB) allowed quick generation of SOC platforms that enabled us to focus on the software aspects of the porting project. Throughout the porting effort, Lattice showed ongoing respect for the open source community processes and supported a future upstream merge of the ported code.”

The uClinux OS port to the LatticeMico32 offers a similar file system and the networking capabilities of Linux, but without an MMU. The port to the LatticeMico32 architecture (referred to as “lm32-nommu” by uClinux developers) is based on Linux2.6. To provide a complete solution, the port includes current versions of uClinux “userland” applications, U-Boot, uClib and uClinux-based user commands. Complete documentation is included with the port. Files needed for a demonstration on a LatticeECP2 evaluation board are available with the release, including the project files required to recreate the demo and begin development. Lattice provides development support on uClinux and Lattice FPGAs through its online uClinux technical forum, as well as its normal applications technical support process.

Enhancements to the LatticeMico32 Embedded Processor System include support for slave-side bus arbitration for overall improvement in system performance by allowing multiple bus masters, such as a DMA controller and the LatticeMico32 microprocessor, to communicate concurrently to different slave devices. The Mico System tool chain is now supported on the Linux operating system, and includes support for integrating the LatticeMico32 microprocessor and other Verilog IP from Lattice into a VHDL design. Lattice provides a selection of IPexpress- compatible IP cores that are also available as peripherals to the LatticeMico32 microprocessor and are Mico System Builder ready. These IP cores, which include DDR, DDR2 and SDRAM memory controllers, a Tri-Speed Ethernet Media Access Controller and PCI 33MHz Target, among others, are automatically integrated into the Mico System Builder upon configuration in the IPexpress tool. Debug support has been enhanced with this release by the ability to daisy chain multiple designs, including the LatticeMico32 microprocessor, within the Reveal™ JTAG-based hardware debugger.

The LatticeMico8 microcontroller has also been enhanced to increase the breadth of embedded applications in which it can be employed. These include the ability to configure the number of lines of code possible and improved portability across FPGA architectures. The range of the branch operation has been increased fourfold to accommodate a larger code space. For improved support of high-level language compilers, the ability to configure the stack size has also been introduced.